Milltronics CVCC Manuál s instrukcemi Strana 44

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BIC-II GENERAL REGISTERS
Self Test
The BIC-II Self Test is an on-line self diagnostic feature which checks and reports on the health of the BIC-II
hardware.
Activate the BIC-II Self Test following: power up, write/read Port Initialization conflict, erroneous data, and as
frequently as otherwise desired.
Some MMI software packages may include provisions for diagnostics utilizing Modbus Function 8, codes 02
and 10. These operations are supported by the BIC-II. Refer to your software manual and Modbus device
manual for instructions.
Alternatively, the BIC-II Self Test holding register may be utilized to perform the same function.
To activate a Self Test, write $FFFF to holding register 48001. The Self Test takes approximately 25 seconds.
During this time, no other communications with the specified BIC-II is possible.
Read the holding register after this 25 second period.
Self Test Register bit map, (bits 15 to 8 always = 0):
bit 7 (EEPROM power on error):
bit 6 (EEPROM checksum error):
bit 5 (EEPROM write error):bit value 0 = GOOD
bit 4 (RAM test error):bit value 1 = BAD
bit 3 (RAM table error):
bit 2 (ROM checksum error):
bit 1 (UART test error):
bit 0 (UART initialization error):
An EEPROM write error is caused by a power interruption during a Port Initialization.
A RAM table error occurs when a power interruption has exceeded the capability of the
BIC-II RAM back-up super capacitor (about 24 hours).
example: 1. Write $FFFF with the specified BIC-II address (e.g. 01) to holding register 48001
to activate a Self Test.
2. After 25 seconds, read the holding register (48001) of the specified BIC-II.
3. a) If the response 00 is received, all is well.
b) If 00 is not received (e.g. 03, UART failure), write $0000 to the register
to clear all bits, and repeat steps 1 and 2. If the same error persists, replace
the BIC-II and/or contact Milltronics or your local representative.
Bits 5,3, and 0 are dynamic during normal operation. These bits may be read without the need for initiating the
Self Test, and interrupting the BIC-II communications.
If it is desireable to reset only some of the Self Test register bits, write the corresponding value ($0001 to
$00FE) to leave the desired bits set (1) or reset (0).
PL-371 9 – 2
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